module AddSub(A, BusWires, I, out);
	
    /* Inputs */
    input [8:0] A, BusWires;  // Register A & Bus wire
	input [2:0] I;            // Instruction
    
    /* Outputs */
    output reg [8:0] out;     // AddSub Result
	
    /* Instruction Parameters */
	parameter add = 3'b010, sub = 3'b011;
	
	always @(*) begin
		case (I)
			add:		out <= (A + BusWires);
			sub:  	    out <= (A - BusWires);
			default:	out = 9'bxxxxxxxxx;
		endcase
	end
endmodule
